Samsung Semiconductor
Senior Staff Engineer, Digital Design
Samsung Semiconductor, San Jose, California, United States, 95199
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Senior Staff Engineer, Digital Design
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Samsung Semiconductor
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Please Note To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.
Advancing the World’s Technology Together Our technology solutions power the tools you use every day—smartphones, electric vehicles, hyperscale data centers, IoT devices, and more. Here, you’ll be part of a global leader whose innovative designs push the boundaries of what's possible and power the future.
We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves and building a better tomorrow for employees, customers, partners, and communities.
Samsung Semiconductor Inc. (SSI) is advancing the world’s technology. As a leader in Memory, System, LSI and LCD technologies, our U.S. teams contribute to breakthroughs in 5G, SOC, memory and display. We are looking for team members who share our commitment to learning and growth and excel when collaborating within and across teams.
Location: Daily onsite presence at our San Jose, CA headquarters in alignment with our Flexible Work policy.
What You’ll Do This team is focused on digital design for high-speed SerDes. Ideal candidates will have 5+ years of industrial experience specialized in SerDes DSP and digital/logical PHY design. You will be required to understand the end-to-end digital design flow to collaborate accurately and efficiently with system and analog teams.
What You Bring
BS with 15 years, MS with 13+ years, or PhD with 10+ in Electrical Engineering.
5+ years of experience in high-speed digital design, including SerDes PHY or DSP design.
Proficient with Verilog‑HDL/System Verilog coding for SerDes PHY, including link‑training, analog circuits and ADC foreground/background calibration and adaptation.
Deep understanding of high-speed serial interconnect architectures such as PCIe, 100/200Gbps per lane Ethernet and design trade‑offs.
RTL logic design, debug and functional verification.
Experience in synthesis, CDC, static timing analysis.
Understanding impacts of analog and mixed-signal design and verification on digital‑on‑top development flow.
Deep understanding of Signal Integrity and Power Integrity modeling for High‑Speed designs.
Understanding of micro‑architecture with standard peripherals such as D2D, AMBA BUS, I2C, SPI and I2C.
Understanding of design for testability (DFT) flow.
Strong background in DSP and algorithms is a plus.
Familiarity with the PMA/PMD/PCS layers of the Ethernet protocol is a plus.
Understanding of fundamental physical design flows and stages.
Firmware development of embedded microcontroller systems is a plus.
You’re inclusive, adapting your style to the situation and diverse global norms.
An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
Innovative and creative, you proactively explore new ideas and adapt quickly to change.
What We Offer The pay range below is for all roles at this level across all U.S. locations and functions. Individual pay rates depend on a number of factors—including the role’s function and location, as well as the individual’s knowledge, skills, experience, education, and training. We also offer incentive opportunities that reward employees based on individual and company performance.
This includes a comprehensive benefits package centered around the wellbeing of employees and their loved ones: Medical/Dental/Vision/401k, inclusive rewards plan, charitable giving match, paid time off starting at 4+ weeks a year, holidays and sick leave, family support stipend, virtual vet care, on‑demand wellness apps, free confidential therapy, onsite café and gym, virtual classes, and flexible work options.
Base Pay Range: $180,950—$289,050 USD.
Equal Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. We provide comprehensive accommodations to candidates with disabilities, long‑term conditions, neurodivergent individuals, or those requiring pregnancy‑related support.
Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings.
Applicant AI Use Policy We support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate’s true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research. Violation of this policy may result in immediate disqualification from the hiring process.
Applicant Privacy Policy https://semiconductor.samsung.com/about-us/careers/us/privacy/
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Senior Staff Engineer, Digital Design
role at
Samsung Semiconductor
Get AI-powered advice on this job and more exclusive features.
Direct message the job poster from Samsung Semiconductor.
Please Note To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.
Advancing the World’s Technology Together Our technology solutions power the tools you use every day—smartphones, electric vehicles, hyperscale data centers, IoT devices, and more. Here, you’ll be part of a global leader whose innovative designs push the boundaries of what's possible and power the future.
We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves and building a better tomorrow for employees, customers, partners, and communities.
Samsung Semiconductor Inc. (SSI) is advancing the world’s technology. As a leader in Memory, System, LSI and LCD technologies, our U.S. teams contribute to breakthroughs in 5G, SOC, memory and display. We are looking for team members who share our commitment to learning and growth and excel when collaborating within and across teams.
Location: Daily onsite presence at our San Jose, CA headquarters in alignment with our Flexible Work policy.
What You’ll Do This team is focused on digital design for high-speed SerDes. Ideal candidates will have 5+ years of industrial experience specialized in SerDes DSP and digital/logical PHY design. You will be required to understand the end-to-end digital design flow to collaborate accurately and efficiently with system and analog teams.
What You Bring
BS with 15 years, MS with 13+ years, or PhD with 10+ in Electrical Engineering.
5+ years of experience in high-speed digital design, including SerDes PHY or DSP design.
Proficient with Verilog‑HDL/System Verilog coding for SerDes PHY, including link‑training, analog circuits and ADC foreground/background calibration and adaptation.
Deep understanding of high-speed serial interconnect architectures such as PCIe, 100/200Gbps per lane Ethernet and design trade‑offs.
RTL logic design, debug and functional verification.
Experience in synthesis, CDC, static timing analysis.
Understanding impacts of analog and mixed-signal design and verification on digital‑on‑top development flow.
Deep understanding of Signal Integrity and Power Integrity modeling for High‑Speed designs.
Understanding of micro‑architecture with standard peripherals such as D2D, AMBA BUS, I2C, SPI and I2C.
Understanding of design for testability (DFT) flow.
Strong background in DSP and algorithms is a plus.
Familiarity with the PMA/PMD/PCS layers of the Ethernet protocol is a plus.
Understanding of fundamental physical design flows and stages.
Firmware development of embedded microcontroller systems is a plus.
You’re inclusive, adapting your style to the situation and diverse global norms.
An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
Innovative and creative, you proactively explore new ideas and adapt quickly to change.
What We Offer The pay range below is for all roles at this level across all U.S. locations and functions. Individual pay rates depend on a number of factors—including the role’s function and location, as well as the individual’s knowledge, skills, experience, education, and training. We also offer incentive opportunities that reward employees based on individual and company performance.
This includes a comprehensive benefits package centered around the wellbeing of employees and their loved ones: Medical/Dental/Vision/401k, inclusive rewards plan, charitable giving match, paid time off starting at 4+ weeks a year, holidays and sick leave, family support stipend, virtual vet care, on‑demand wellness apps, free confidential therapy, onsite café and gym, virtual classes, and flexible work options.
Base Pay Range: $180,950—$289,050 USD.
Equal Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. We provide comprehensive accommodations to candidates with disabilities, long‑term conditions, neurodivergent individuals, or those requiring pregnancy‑related support.
Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings.
Applicant AI Use Policy We support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate’s true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research. Violation of this policy may result in immediate disqualification from the hiring process.
Applicant Privacy Policy https://semiconductor.samsung.com/about-us/careers/us/privacy/
#J-18808-Ljbffr