Senior ASIC & FPGA Design Engineer (SoC/Pre-Silicon)

A leading technology recruitment firm in San Francisco seeks an Asic Design Engineer to define and bring up FPGA platforms for validation and software development. The ideal candidate will have over 5 years of relevant experience and skills in Python or C/C++. Responsibilities include mapping ASIC RTL to FPGA and creating test plans to validate SoC functionality. Strong analytical skills and a degree in Electrical Engineering are essential. Familiarity with lab equipment is a plus. #J-18808-Ljbffr