Qualcomm
MBIST Diagnostics/Solutions Engineer - Staff/Sr.Staff
Qualcomm, San Diego, California, United States, 92189
Company:
Qualcomm Semiconductor Limited
Job Area: Engineering Group > ASICS Engineering
General Summary: We are seeking an experienced and innovative professional to lead the development of advanced memory diagnostic methodologies and tools for next‑generation SoCs. This role involves driving cutting‑edge solutions in DRAM design‑for‑diagnostics, failure analysis, and AI/ML‑based pattern recognition to improve memory yield and reliability across high‑volume manufacturing environments.
Minimum Qualifications:
Experience in developing diagnostic tools for emerging memory technologies.
Exposure to data analytics platforms for large‑scale analytics and yield/failure analysis.
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
Preferred Qualifications:
10+ years of experience in memory diagnostics/bitmapping, DRAM test, and failure analysis in advanced SoC environments.
Deep understanding of fault isolation, redundancy schemes, fault models and memory test algorithms.
Experience with AI/ML techniques applied to pattern recognition or data analytics in semiconductor test or yield domains.
Proficiency in Python, Perl, TCL and data visualization tools.
Experience with HTOL, RMA debug, and high‑volume manufacturing diagnostics.
Knowledge of memory redundancy, error correction, and self‑repair mechanisms.
Knowledge of implementation of MBIST solutions using industry-standard tools (e.g., Mentor Tessent, Synopsys).
Strong analytical and problem‑solving skills with a data‑driven mindset.
Excellent communication and collaboration skills in a cross‑functional, global environment.
Key Responsibilities:
Develop and enhance memory diagnostic methodologies, including DRAM‑specific diagnostics.
Define and develop memory test and repair algorithms (BIRA, ECC, redundancy analysis).
Isolate failing memory locations and analyze failure signatures to support yield improvement, RMA, and HTOL debug.
Evaluate and improve memory yield through data analysis and test coverage enhancements.
Design and implement AI/ML‑based pattern recognition tools to enable advanced bitmapping and failure characterization beyond the capabilities of current tools.
Collaborate with silicon validation, product engineering, and yield analysis teams to correlate diagnostics with silicon behavior.
Drive innovation in diagnostic algorithms and tool development to support future technology nodes and memory architectures.
Additional Minimum Qualifications:
Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Qualcomm is an equal‑opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, Qualcomm is committed to providing an accessible process.
For more information about this role, please contact Qualcomm Careers.
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Job Area: Engineering Group > ASICS Engineering
General Summary: We are seeking an experienced and innovative professional to lead the development of advanced memory diagnostic methodologies and tools for next‑generation SoCs. This role involves driving cutting‑edge solutions in DRAM design‑for‑diagnostics, failure analysis, and AI/ML‑based pattern recognition to improve memory yield and reliability across high‑volume manufacturing environments.
Minimum Qualifications:
Experience in developing diagnostic tools for emerging memory technologies.
Exposure to data analytics platforms for large‑scale analytics and yield/failure analysis.
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
Preferred Qualifications:
10+ years of experience in memory diagnostics/bitmapping, DRAM test, and failure analysis in advanced SoC environments.
Deep understanding of fault isolation, redundancy schemes, fault models and memory test algorithms.
Experience with AI/ML techniques applied to pattern recognition or data analytics in semiconductor test or yield domains.
Proficiency in Python, Perl, TCL and data visualization tools.
Experience with HTOL, RMA debug, and high‑volume manufacturing diagnostics.
Knowledge of memory redundancy, error correction, and self‑repair mechanisms.
Knowledge of implementation of MBIST solutions using industry-standard tools (e.g., Mentor Tessent, Synopsys).
Strong analytical and problem‑solving skills with a data‑driven mindset.
Excellent communication and collaboration skills in a cross‑functional, global environment.
Key Responsibilities:
Develop and enhance memory diagnostic methodologies, including DRAM‑specific diagnostics.
Define and develop memory test and repair algorithms (BIRA, ECC, redundancy analysis).
Isolate failing memory locations and analyze failure signatures to support yield improvement, RMA, and HTOL debug.
Evaluate and improve memory yield through data analysis and test coverage enhancements.
Design and implement AI/ML‑based pattern recognition tools to enable advanced bitmapping and failure characterization beyond the capabilities of current tools.
Collaborate with silicon validation, product engineering, and yield analysis teams to correlate diagnostics with silicon behavior.
Drive innovation in diagnostic algorithms and tool development to support future technology nodes and memory architectures.
Additional Minimum Qualifications:
Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Qualcomm is an equal‑opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, Qualcomm is committed to providing an accessible process.
For more information about this role, please contact Qualcomm Careers.
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