L3Harris Technologies
Senior Member Engineering Staff-ASIC/FPGA Design
L3Harris Technologies - Camden, New Jersey, United States, 08100
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Senior Member Engineering Staff-ASIC/FPGA Design
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L3Harris Technologies 21 hours ago Be among the first 25 applicants Join to apply for the
Senior Member Engineering Staff-ASIC/FPGA Design
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L3Harris Technologies L3Harris is dedicated to recruiting and developing high-performing talent who are passionate about what they do. Our employees are unified in a shared dedication to our customers’ mission and quest for professional growth. L3Harris provides an inclusive, engaging environment designed to empower employees and promote work-life success. Fundamental to our culture is an unwavering focus on values, dedication to our communities, and commitment to excellence in everything we do.
L3Harris Technologies is the Trusted Disruptor in the defense industry. With customers’ mission-critical needs always in mind, our employees deliver end-to-end technology solutions connecting the space, air, land, sea and cyber domains in the interest of national security.
Job Title: ASIC/FPGA Design: Senior Member of Engineering Staff (SMES)
Job Code: 26283
Job Location: Camden, NJ
Schedule: 9/80 Regular with every other Friday off
Are you ready to take your engineering career to the next level and be a part of something truly extraordinary? Join our trailblazing team in the Philadelphia metro area, where you'll dive into the thrilling world of high-assurance encryption products and programs that are pivotal to national defense. Our rapidly expanding business is not just growing—it's exploding with opportunities for innovation and impact in network and tactical encryption products and systems. Imagine working on the front lines of technology, developing state-of-the-art solutions that safeguard our nation's security. You'll collaborate with some of the brightest minds in the industry, in an environment that champions creativity and excellence. If you're passionate about tackling complex challenges and eager to contribute to groundbreaking projects that make a real difference to our warfighters, citizens, and nation; this is your chance to shine. Apply now and embark on this exhilarating journey with us, shaping the future of defense technology!
Job Description:
Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) will be part of the key ASIC/FPGA design team, responsible for the delivery of FPGA/ASICs for high-speed crypto applications. S/he will architect, implement high speed crypto architectures, on ASICs/Xilinx Zynq/MPSOC class FPGAs, with hands on design/debug with Ethernet, TCP/IP protocols.
L3Harris has state-of-the-art EDA flows/methodologies including Synopsys DC/Primetime/Synplify, Xilinx/Intel/Microchip EDA with HLS, Mentor EDA Family suite : Questa, VIPs, UVM framework, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC), Questa Lint, and Catapult (HLS). This is a key, high impact role in the organization to ensure robust quality and delivery of communication products for National Security.
Essential Functions:
Responsible for deriving engineering specifications from system requirements and developing detailed architecture Execute design (RTL AND/OR HLS (C++ to RTL)) and RTL quality (RDC, CDC, Formal, Lint) Generate test plans Perform module level verification, synthesis/STA, Lab debug, SW driven validation on Linux based SOC evaluation boards Silicon/FPGA bring up, characterization and production ramp/support/collateral
Qualifications:
BSEE, MSEE Preferred. 5+ year’s equivalent experience developing, implementing, and verification of high-performance communications/networking ASIC/FPGA products. Experience mapping algorithms and standards (Ethernet, TCP/IP, AXI) to hardware and architecture/system design tradeoffs. Proficient with CDC, RDC. Formal EDA. Proficient in VHDL. Proficient with Synthesis/PAR: SDC, Synopsys Synplify, Vivado Strong logic/board debug, and analytical skills. Experience with project leadership and EVM Excellent written, verbal, and presentation skills. Active SECRET Clearance
Preferred Additional Skills:
A big plus if the candidate possesses “any” of the following: Proficiency in C++ (OOP) Proficiency with Xilinx MPSOC design with writing/debugging with SDKs, BSPs on bare metal/PetaLinux OS. Knowledge of PCIe, NVMe, USB protocols. Experience with High level synthesis (Xilinx Vivado HLS, AND/OR Mentor Calypto ).
In compliance with pay transparency requirements, the salary range for this role is $111,515 - $151,500. This is not a guarantee of compensation or salary, as final offer amount may vary based on factors including but not limited to experience and geographic location. L3Harris also offers a variety of benefits, including health and disability insurance, 401(k) match, flexible spending accounts, EAP, education assistance, parental leave, paid time off, and company-paid holidays. The specific programs and options available to an employee may vary depending on date of hire, schedule type, and the applicability of collective bargaining agreements.
L3Harris Technologies is proud to be an Equal Opportunity Employer. L3Harris is committed to treating all employees and applicants for employment with respect and dignity and maintaining a workplace that is free from unlawful discrimination. All applicants will be considered for employment without regard to race, color, religion, age, national origin, ancestry, ethnicity, gender (including pregnancy, childbirth, breastfeeding or other related medical conditions), gender identity, gender expression, sexual orientation, marital status, veteran status, disability, genetic information, citizenship status, characteristic or membership in any other group protected by federal, state or local laws. L3Harris maintains a drug-free workplace and performs pre-employment substance abuse testing and background checks, where permitted by law.
Please be aware many of our positions require the ability to obtain a security clearance. Security clearances may only be granted to U.S. citizens. In addition, applicants who accept a conditional offer of employment may be subject to government security investigation(s) and must meet eligibility requirements for access to classified information.
By submitting your resume for this position, you understand and agree that L3Harris Technologies may share your resume, as well as any other related personal information or documentation you provide, with its subsidiaries and affiliated companies for the purpose of considering you for other available positions.
L3Harris Technologies is an E-Verify Employer. Please click here for the E-Verify Poster in English or Spanish. For information regarding your Right To Work, please click here for English or Spanish. Seniority level
Seniority level Mid-Senior level Employment type
Employment type Full-time Job function
Job function Engineering and Information Technology Industries Defense and Space Manufacturing Referrals increase your chances of interviewing at L3Harris Technologies by 2x Sign in to set job alerts for “Senior Software Engineer” roles.
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Senior Member Engineering Staff-ASIC/FPGA Design
role at
L3Harris Technologies 21 hours ago Be among the first 25 applicants Join to apply for the
Senior Member Engineering Staff-ASIC/FPGA Design
role at
L3Harris Technologies L3Harris is dedicated to recruiting and developing high-performing talent who are passionate about what they do. Our employees are unified in a shared dedication to our customers’ mission and quest for professional growth. L3Harris provides an inclusive, engaging environment designed to empower employees and promote work-life success. Fundamental to our culture is an unwavering focus on values, dedication to our communities, and commitment to excellence in everything we do.
L3Harris Technologies is the Trusted Disruptor in the defense industry. With customers’ mission-critical needs always in mind, our employees deliver end-to-end technology solutions connecting the space, air, land, sea and cyber domains in the interest of national security.
Job Title: ASIC/FPGA Design: Senior Member of Engineering Staff (SMES)
Job Code: 26283
Job Location: Camden, NJ
Schedule: 9/80 Regular with every other Friday off
Are you ready to take your engineering career to the next level and be a part of something truly extraordinary? Join our trailblazing team in the Philadelphia metro area, where you'll dive into the thrilling world of high-assurance encryption products and programs that are pivotal to national defense. Our rapidly expanding business is not just growing—it's exploding with opportunities for innovation and impact in network and tactical encryption products and systems. Imagine working on the front lines of technology, developing state-of-the-art solutions that safeguard our nation's security. You'll collaborate with some of the brightest minds in the industry, in an environment that champions creativity and excellence. If you're passionate about tackling complex challenges and eager to contribute to groundbreaking projects that make a real difference to our warfighters, citizens, and nation; this is your chance to shine. Apply now and embark on this exhilarating journey with us, shaping the future of defense technology!
Job Description:
Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) will be part of the key ASIC/FPGA design team, responsible for the delivery of FPGA/ASICs for high-speed crypto applications. S/he will architect, implement high speed crypto architectures, on ASICs/Xilinx Zynq/MPSOC class FPGAs, with hands on design/debug with Ethernet, TCP/IP protocols.
L3Harris has state-of-the-art EDA flows/methodologies including Synopsys DC/Primetime/Synplify, Xilinx/Intel/Microchip EDA with HLS, Mentor EDA Family suite : Questa, VIPs, UVM framework, Clock Domain Crossing (CDC), Reset Domain Crossing (RDC), Questa Lint, and Catapult (HLS). This is a key, high impact role in the organization to ensure robust quality and delivery of communication products for National Security.
Essential Functions:
Responsible for deriving engineering specifications from system requirements and developing detailed architecture Execute design (RTL AND/OR HLS (C++ to RTL)) and RTL quality (RDC, CDC, Formal, Lint) Generate test plans Perform module level verification, synthesis/STA, Lab debug, SW driven validation on Linux based SOC evaluation boards Silicon/FPGA bring up, characterization and production ramp/support/collateral
Qualifications:
BSEE, MSEE Preferred. 5+ year’s equivalent experience developing, implementing, and verification of high-performance communications/networking ASIC/FPGA products. Experience mapping algorithms and standards (Ethernet, TCP/IP, AXI) to hardware and architecture/system design tradeoffs. Proficient with CDC, RDC. Formal EDA. Proficient in VHDL. Proficient with Synthesis/PAR: SDC, Synopsys Synplify, Vivado Strong logic/board debug, and analytical skills. Experience with project leadership and EVM Excellent written, verbal, and presentation skills. Active SECRET Clearance
Preferred Additional Skills:
A big plus if the candidate possesses “any” of the following: Proficiency in C++ (OOP) Proficiency with Xilinx MPSOC design with writing/debugging with SDKs, BSPs on bare metal/PetaLinux OS. Knowledge of PCIe, NVMe, USB protocols. Experience with High level synthesis (Xilinx Vivado HLS, AND/OR Mentor Calypto ).
In compliance with pay transparency requirements, the salary range for this role is $111,515 - $151,500. This is not a guarantee of compensation or salary, as final offer amount may vary based on factors including but not limited to experience and geographic location. L3Harris also offers a variety of benefits, including health and disability insurance, 401(k) match, flexible spending accounts, EAP, education assistance, parental leave, paid time off, and company-paid holidays. The specific programs and options available to an employee may vary depending on date of hire, schedule type, and the applicability of collective bargaining agreements.
L3Harris Technologies is proud to be an Equal Opportunity Employer. L3Harris is committed to treating all employees and applicants for employment with respect and dignity and maintaining a workplace that is free from unlawful discrimination. All applicants will be considered for employment without regard to race, color, religion, age, national origin, ancestry, ethnicity, gender (including pregnancy, childbirth, breastfeeding or other related medical conditions), gender identity, gender expression, sexual orientation, marital status, veteran status, disability, genetic information, citizenship status, characteristic or membership in any other group protected by federal, state or local laws. L3Harris maintains a drug-free workplace and performs pre-employment substance abuse testing and background checks, where permitted by law.
Please be aware many of our positions require the ability to obtain a security clearance. Security clearances may only be granted to U.S. citizens. In addition, applicants who accept a conditional offer of employment may be subject to government security investigation(s) and must meet eligibility requirements for access to classified information.
By submitting your resume for this position, you understand and agree that L3Harris Technologies may share your resume, as well as any other related personal information or documentation you provide, with its subsidiaries and affiliated companies for the purpose of considering you for other available positions.
L3Harris Technologies is an E-Verify Employer. Please click here for the E-Verify Poster in English or Spanish. For information regarding your Right To Work, please click here for English or Spanish. Seniority level
Seniority level Mid-Senior level Employment type
Employment type Full-time Job function
Job function Engineering and Information Technology Industries Defense and Space Manufacturing Referrals increase your chances of interviewing at L3Harris Technologies by 2x Sign in to set job alerts for “Senior Software Engineer” roles.
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