獰慣數
Sr ASICFPGA Verification Engineer
獰慣數 - Irvine, California, United States, 92713
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Overview
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.
SENIOR ASIC/FPGA VERIFICATION ENGINEER
We are looking to hire a Senior Verification Engineer with hands-on experience, excellent communication skills and leadership skills. As a Senior Verification Engineer you’ll help define the verification methodology for the complex ASICs and FPGAs. You will design and implement test benches, come up with a test plan, write test cases, and run test regressions to help verify designs. You may get involved in bring-up and system validation of these ASICs and FPGAs. BASIC QUALIFICATIONS:
Bachelor of Science Degree in computer engineering or electrical engineering. 8+ years of experience verifying complex ASICs / FPGAs. 5+ years of experience in ASIC / FPGA verification using C/C++ and/or System Verilog. 5+ years of experience with verification methodology like OVM / UVM / MM. 5+ years of experience with building and setting up scalable simulation / verification environments. 5+ years of experience with scripting (bash/csh, Perl, TCL, Python, etc.). PREFERRED SKILLS AND EXPERIENCE:
Master’s Degree in Computer Engineering, Electrical Engineering or equivalent. Constrained Random Verification Experience. Any FPGA/ASIC design experience. Experience with high reliability design and implementations. Experience with any packet based protocols (PCI Express etc.), Network centric designs (Ethernet, IP, FC). Any exposure to Wireless Protocol (LTE, Wi-Fi etc.) designs. Familiarity with test scoping for complex designs, code coverage, functional coverage, assertions. Ability to focus on finding design issues, corner cases and out of box ideas to make designs more robust. Demonstrate the ability to work in a dynamic environment that includes working with changing needs and requirements. ADDITIONAL REQUIREMENTS:
Must be available to work extended hours and weekends as needed. ITAR REQUIREMENTS:
To conform to U.S. Government space technology export regulations, applicant must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State. SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status. Applicants wishing to view a copy of SpaceX’s Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should notify the Human Resources Department at (310) 363-6000.
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We are looking to hire a Senior Verification Engineer with hands-on experience, excellent communication skills and leadership skills. As a Senior Verification Engineer you’ll help define the verification methodology for the complex ASICs and FPGAs. You will design and implement test benches, come up with a test plan, write test cases, and run test regressions to help verify designs. You may get involved in bring-up and system validation of these ASICs and FPGAs. BASIC QUALIFICATIONS:
Bachelor of Science Degree in computer engineering or electrical engineering. 8+ years of experience verifying complex ASICs / FPGAs. 5+ years of experience in ASIC / FPGA verification using C/C++ and/or System Verilog. 5+ years of experience with verification methodology like OVM / UVM / MM. 5+ years of experience with building and setting up scalable simulation / verification environments. 5+ years of experience with scripting (bash/csh, Perl, TCL, Python, etc.). PREFERRED SKILLS AND EXPERIENCE:
Master’s Degree in Computer Engineering, Electrical Engineering or equivalent. Constrained Random Verification Experience. Any FPGA/ASIC design experience. Experience with high reliability design and implementations. Experience with any packet based protocols (PCI Express etc.), Network centric designs (Ethernet, IP, FC). Any exposure to Wireless Protocol (LTE, Wi-Fi etc.) designs. Familiarity with test scoping for complex designs, code coverage, functional coverage, assertions. Ability to focus on finding design issues, corner cases and out of box ideas to make designs more robust. Demonstrate the ability to work in a dynamic environment that includes working with changing needs and requirements. ADDITIONAL REQUIREMENTS:
Must be available to work extended hours and weekends as needed. ITAR REQUIREMENTS:
To conform to U.S. Government space technology export regulations, applicant must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State. SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status. Applicants wishing to view a copy of SpaceX’s Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should notify the Human Resources Department at (310) 363-6000.
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