Lead ASIC Verification Architect — Silicon Photonics

A tech company specializing in optical solutions is seeking a Principal Design Verification Engineer in San Jose, CA. This role involves leading the verification strategy for advanced silicon photonic chips, mentoring engineers, and addressing complex system-level challenges. The ideal candidate has a Master's degree in Electrical or Computer Engineering, with extensive experience in ASIC/SoC verification, and proficient in SystemVerilog and UVM methodologies. The salary range for this position is $180,000 to $230,000. #J-18808-Ljbffr