Senior SoC RTL Design Engineer — Edge AI ASIC (Equity)

A semiconductor solutions company is seeking a Senior SoC RTL Design Engineer in San Jose, CA to lead RTL development and integration. The role involves working on sophisticated SoC implementations, optimizing performance, and collaborating with key engineering teams. Candidates should have substantial experience in RTL design with a degree in electrical or computer engineering. Benefits include equity, 401(k) matching, and comprehensive insurance, all of which contribute to a competitive compensation package. #J-18808-Ljbffr